Semiconductor device having a interlayer insulation film with low dielectric constant and high mechanical strength

ABSTRACT

A method for fabricating a semiconductor includes the steps of forming a porous insulation film and wires on a substrate, the wires embedded in the porous insulation film having a portion adjacent to the wires and a remote portion spaced apart from the wires; and applying an energy beam to the remote portion to change the structure of the porous insulation film such that an Young&#39;s modulus of the porous insulation film increased so as to substantially reinforce the strength of the porous insulation film.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional application of Ser. No. 11/944,053,filed Nov. 21, 2007, which is based on and claims the benefit ofpriority from Japanese Patent Application No. 2006-317446 filed on Nov.24, 2006, the entire contents of which being hereby incorporated byreference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to semiconductor devices and methods forfabricating the same. More particularly, the invention relates to asemiconductor device which has high mechanical strength despite the useof a material having a low relative dielectric constant for forminginsulation films.

2. Description of the Related Art

With recent higher integration of semiconductor devices, wiring widthand wiring pitch have been reduced markedly. Since the parasiticcapacitance between wires is inversely proportional to the distancebetween adjacent wires (wiring pitch), a reduction in wiring pitchresults in an increase in the parasitic capacitance between wires. Theincrease in the parasitic capacitance leads to a delay in signalpropagation in the wires, which is an inhibiting factor in improving theoperating speed of semiconductor devices.

In order to overcome such an “increase in the parasitic capacitancebetween wires”, it is effective to decrease the relative dielectricconstant of interlayer insulation films. That is, by using, as thematerial for interlayer insulation films, a material having a lowerrelative dielectric constant than materials commonly used, the parasiticcapacitance between wires is decreased.

A porous insulation film has been noted as an insulation film having avery low relative dielectric constant. The porous insulation film is afilm having many pores therein. If the “porous insulation film” is usedas a material for an interlayer insulation film, the parasiticcapacitance between wires can be decreased. However, under the influenceof many pores present in the film, the mechanical strength of the filmis decreased. As a result, it becomes difficult to provide a sufficientmechanical strength required for the device.

Under these circumstances, it has been proposed that a porous insulationfilm is selectively used in an interlayer insulation film. That is, inan interlayer insulation film, a porous insulation film is used only inan area that does not require strength (refer to Japanese UnexaminedPatent Application Publication No. 2003-100757 [Patent Document 1] andJapanese Unexamined Patent Application Publication No. 2004-179386[Patent Document 2]). Patent Document 1 discloses that a non-porousinsulation film is provided in bonding pad forming regions so that theinsulation film is not fractured during bonding, and a porous insulationfilm is provided in regions other than the bonding pad forming regions.Patent Document 2 discloses an example in which an interlayer insulationfilm having a low dielectric constant and being made of a porousmaterial is provided only in narrow regions between wires, and a usualinterlayer insulation film made of silicon dioxide (SiO₂) is provided inregions other than the narrow regions.

However, in each of the techniques disclosed in Patent Documents 1 and2, when an interlayer insulating film is formed, separate steps offorming two films made of different insulating materials (i.e., a porousinsulating material and a non-porous insulating material) are required.Thus, the number of steps required for forming the interlayer insulatingfilm is increased.

SUMMARY

In a first aspect, a semiconductor device includes a substrate; a porousinsulation film formed on the substrate; and a plurality of wiresembedded in the porous insulation film, the porous insulation filmhaving a portion adjacent to the wires and a remote portion spaced apartfrom the wires, the remote portion having an increased Young's Modulusso as to substantially reinforce the strength of the porous insulationfilm.

In a second aspect, a method for fabricating a semiconductor deviceincludes the steps of forming a porous insulation film and a pluralityof wires on the substrate, the wires embedded in the porous insulationfilm having a portion adjacent to the wires and a remote portion spacedapart from the wires; and applying an energy beam to the remote portionto change the structure of the porous insulation film such that anYoung's modulus of the porous insulation film increased so as tosubstantially reinforce the strength of the porous insulation film.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of a semiconductor device according toa first embodiment of the present invention;

FIG. 2 is a top view showing a first wiring layer of the semiconductordevice according to the first embodiment of the present invention;

FIGS. 3A and 3B are each a cross-sectional view showing a step in amethod for fabricating a semiconductor device (part 1) according to thefirst embodiment of the present invention;

FIGS. 4A and 4B are each a cross-sectional view showing a step in themethod for fabricating the semiconductor device (part 2) according tothe first embodiment of the present invention;

FIG. 5 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 3) according to the firstembodiment of the present invention;

FIG. 6 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 4) according to the firstembodiment of the present invention;

FIG. 7 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 5) according to the firstembodiment of the present invention;

FIG. 8 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 6) according to the firstembodiment of the present invention;

FIG. 9 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 7) according to the firstembodiment of the present invention;

FIG. 10 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 8) according to the firstembodiment of the present invention;

FIG. 11 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 9) according to the firstembodiment of the present invention;

FIG. 12 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 10) according to the firstembodiment of the present invention;

FIG. 13 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 11) according to the firstembodiment of the present invention;

FIG. 14 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 12) according to the firstembodiment of the present invention;

FIG. 15 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 13) according to the firstembodiment of the present invention;

FIG. 16 is a cross-sectional view showing a step in the method forfabricating the semiconductor device (part 14) according to the firstembodiment of the present invention;

FIG. 17 shows the results of the experiments on modification (of porousinsulation films) when the porous insulation films are irradiated withelectron beams;

FIG. 18 shows the results of the experiments on modification (of porousinsulation films) when the porous insulation films are irradiated withultraviolet light;

FIG. 19 is a diagram showing a structural model of a semiconductordevice;

FIG. 20 is a diagram showing conditions for simulation together with across-sectional structure; and

FIG. 21 shows the results of simulation performed under the conditionsshown in FIG. 20.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments of the present invention will be described indetail below with reference to the drawings.

First Embodiment

FIG. 1 is a cross-sectional view of a semiconductor device according toa first embodiment of the present invention. As shown in FIG. 1, in thesemiconductor device, an interlayer insulation film 26, a stopper film28, an insulation film 36, and an interlayer insulation film 38 aredisposed in that order on a semiconductor substrate 10. Elementisolation films 12 are disposed on the semiconductor substrate 10, andtransistors 24 are disposed in element regions 14 defined by the elementisolation films 12.

Furthermore, adhesion layers 32 and conductor plugs 34 are disposed inthe interlayer insulation film 26 and the stopper film 28. Laminatedfilms 48 including barrier films and seed films, and wires 50 aredisposed in the insulation film 36 and the interlayer insulation film38. The wires 50 are, for example, made of copper (Cu). As describedabove, the wires 50 are disposed in the interlayer insulation film 38,and the interlayer insulation film 38 and the wires 50 constitute onelayer (first wiring layer 37).

As shown in FIG. 1, each transistor 24 includes a gate electrode 18surrounded by a gate insulation film 16 and a sidewall insulation film20, source/drain diffusion layers 22 formed in the semiconductorsubstrate 10 (at both sides of the gate electrode 18), etc.

The interlayer insulation film 38 (first insulation film) is, forexample, made of porous silicon oxide. The interlayer insulation film 38includes a modified portion 38′ the porous property of which is modifiedby irradiation of an energy beam, such as an electron beam orultraviolet light. In the porous interlayer insulation film 38, theYoung's modulus E is 8 GPa and the relative dielectric constant K is2.3. In the modified portion 38′, the Young's modulus E is 15 GPa andthe relative dielectric constant K is 2.6. That is, the irradiation ofthe energy beam increases the mechanical strength and the relativedielectric constant. Here, the term “modification” means a change in thestructure of a film.

Referring to FIG. 1, one side of a line 39 b (the side in which thewires 50 are disposed) corresponds to a “non-irradiation area” which isnot irradiated with the energy beam, and the other side of the line 39 bcorresponds to an “irradiation area” which is irradiated with the energybeam. Specifically, the line 39 b delimits a “minimum-pitched wiringarea” that includes wires 50 disposed at a minimum wiring pitch (P=L)and spaces between the wires 50 in the wiring layer 37. As describedabove, in the wiring layer 37, an area with high wiring density (firstarea) is not irradiated with the energy beam, and an area with lowwiring density (second area) is irradiated with the energy beam. In thiscase, the line 39 b corresponds to a boundary line between the firstarea and the second area.

The wiring density is a ratio of the area occupied by the wires to thecross-sectional area of the wiring layer. Specifically, for example, ina cross section 37 a of the wiring layer 37, the ratio of the areaoccupied by wiring portions (wires 50 and laminated wiring films 48)corresponds to the wiring density. As shown in FIG. 1, the cross section37 a is a plane parallel to a plane exposed when the interlayerinsulation film 38 is formed (i.e., a plane parallel to the principalsurface of the semiconductor substrate 10). Consequently, for example,at the design stage, one cross section in the wiring layer 37 is dividedinto a plurality of isometric regions, and the wiring density iscalculated for each region. Thus, the “non-irradiation area” can bedetermined. In such a case, the wiring density is a ratio of the area inwhich the wiring portion is exposed (wiring area) to the area of oneregion (total area).

As shown in FIG. 1, for example, the non-irradiation area corresponds toan area obtained by extending the periphery of the “minimum-pitchedwiring area” by a distance of a half of the minimum pitch between wires(L/2). Furthermore, the non-irradiation area may be defined as the samearea as the “minimum-pitched wiring area”. Furthermore, thenon-irradiation area may be defined as an area obtained by extending bya predetermined distance in the width direction of the wire 50 from thecenter of the wire 50 with respect to all wires 50 in the first wiringlayer (or the wires in the “minimum-pitched wiring area” in the firstwiring layer). Here, the “predetermined distance” may be set to be ahalf of the minimum pitch between wires (L/2). When the “non-irradiationarea” is set with respect to all wires in one layer as described above,it is not necessary to perform the step of specifying a portion of thewiring, and thus the non-irradiation area can be set easily, which isadvantageous.

FIG. 2 is a top view of the first wiring layer shown in FIG. 1. Notethat FIG. 1 is a cross-sectional view taken along the line X-X′ of FIG.2. An area inside the line 39 b shown in FIG. 2 corresponds to the“non-irradiation area”. Here, an area inside a line 39 a may be definedas the “non-irradiation area”. As described above, the energy beam isapplied only to the area with low wiring density (i.e., sparsely wiredarea) other than the area with high wiring density (i.e., densely wiredarea).

A method for fabricating a semiconductor device according to the firstembodiment of the present invention will now be described in detail withreference to FIGS. 3A to 16. FIGS. 3A to 16 are each a cross-sectionalview showing a step in the method for fabricating the semiconductordevice according to the first embodiment.

Step 1

As shown in FIG. 3A, element isolation films 12 and transistors 24 areformed in a semiconductor substrate 10. Specifically, for example, theformation is performed in the following manner.

1) First, the element isolation films 12 are formed in the semiconductorsubstrate 10, for example, by a local oxidation of silicon (LOCOS)process (Step 1-1). The element isolation films 12 define elementregions 14. As the semiconductor substrate 10, for example, a siliconsubstrate is used.

2) Next, the transistors 24 are formed in the element regions 14 (step1-2). Specifically, gate electrodes 18 are formed on the element regions14 with a gate insulation film 16 therebetween. Then, sidewallinsulation films 20 are formed on the sides of the gate electrodes 18.Subsequently, a dopant impurity is implanted into the semiconductorsubstrate 10 using the sidewall insulation films 20 and the gateelectrodes 18 as masks, and thus source/drain diffusion layers 22 areformed in the semiconductor substrate 10 (at both sides of each gateelectrode 18). Thereby, the transistors 24, each having the gateelectrode 18 and the source/drain diffusion layers 22, are formed.

Step 2

As shown in FIG. 3B, an interlayer insulation film 26, a stopper film28, and contact holes 30 are formed. Specifically, for example, theformation is performed in the following manner.

1) First, the interlayer insulation film 26 made of a silicon oxide filmis formed, for example, by CVD, over the entire surface of the substrate(step 2-1). The term “entire surface of the substrate” means an entiresurface, which is provided with the element isolation films 12 and thetransistors 24, of the semiconductor substrate 10. In this embodiment,the semiconductor substrate 10 provided with the insulation films, etc.is, for convenience sake, referred to as the “substrate”. One surface ofthe substrate is referred to as the “surface of the substrate”, and theentire surface of one surface of the substrate is referred to as the“entire surface of the substrate”.

2) Next, the stopper film 28, for example, with a thickness of 50 nm isformed on the interlayer insulation film 26 (step 2-2). The stopper film28 may be made of a SiN film, a hydrogenated SiC film (SiC:H film), anoxygen-doped hydrogenated SiC film (SiC:O:H film), a nitrogen-doped SiCfilm (SiC:N film), or the like, for example, formed by plasma-enhancedCVD. The hydrogenated SiC film is a SiC film in which hydrogen atoms (H)are present. The oxygen-doped hydrogenated SiC film is a SiC film inwhich oxygen atoms (O) and hydrogen atoms (H) are present. Thenitrogen-doped SiC film is a SiC film in which nitrogen atoms (N) arepresent. The stopper film 28 functions as a stopper when a film(tungsten film) embedded in the contact holes 30 formed in theinterlayer insulation film 26 is polished in the step described below.The stopper film 28 also functions as an etching stopper when trenches46 are formed in the interlayer insulation film 38, etc. in the stepdescribed below.

3) Next, using photolithography, the contact holes 30 extending to thesource/drain diffusion layers 22 are formed (step 2-3).

Step 3

As shown in FIG. 4A, adhesion layers 32 and conductor plugs 34 areformed. Specifically, for example, the formation is performed in thefollowing manner.

1) First, a film (not shown) for forming the adhesion layers 32 isformed over the entire surface of the substrate, for example, bysputtering (step 3-1). The film is made of TiN with a thickness of 50 nmand ensures adhesion of the conductor plugs 34 and their underlayers(surfaces of the contact holes 30).

2) Next, a tungsten film 34 (not shown), for example, with a thicknessof 1 μm is formed over the entire surface of the substrate, for example,by CVD (step 3-2).

3) Next, the film for forming the adhesion layers 32 and the tungstenfilm 34 are polished, for example, by CMP, until the surface of thestopper film 28 is exposed. Thereby, the adhesion layers 32 are formedin the contact holes and the conductor plugs 34 made of tungsten areembedded in the contact holes.

Step 4

As shown in FIG. 4B, an insulation film 36 made of an oxygen-dopedhydrogenated SiC film (SiC:O:H film) is formed. Although a SiC film is asemiconductor, the oxygen-doped hydrogenated SiC film that containsoxygen atoms (O) and hydrogen atoms (H) is an insulator. Thus, theinsulation film 36 made of the oxygen-doped hydrogenated SiC film is ahighly dense insulation film. The density of the insulation film 36 ishigher than that of a porous insulation film 38 which will be describedbelow. The insulation film 36 also functions as a barrier film thatprevents diffusion of moisture. Specifically, for example, the formationis performed in the following manner.

1) First, the substrate prepared in step 3 is placed into a chamber of aplasma-enhanced CVD apparatus (not shown) (step 4-1). As theplasma-enhanced CVD apparatus, for example, a parallel-plate-typeplasma-enhanced CVD apparatus is used.

2) Next, the temperature of the substrate is increased to 300° C. to400° C. (step 4-2).

3) Next, a reactive gas is introduced into the chamber (step 4-3).Specifically, first, a siloxane monomer having alkyl groups is vaporizedby a vaporizer (not shown) so as to generate the reactive gas. Then, thereactive gas is introduced into the chamber using an inert gas as acarrier. In this stage, when high-frequency power is applied betweenplate electrodes (not shown), plasma of the reactive gas is generated,and thus the insulation film 36 made of an oxygen-doped hydrogenated SiCfilm is formed. The feed rate of the reactive gas is, for example, 1mg/min.

Step 5

As shown in FIG. 5, a porous interlayer insulation film (firstinsulation film) 38 is formed. Examples of the material constituting theporous interlayer insulation film 38 include (A) a porous silicon oxidefilm, (B) a porous silicon oxide film containing carbon, (C) an organiccompound, and (D) a silicon cluster-containing insulating material. Theformation methods using these materials will be described below insequence.

(A) Interlayer Insulation Film Made of Porous Silicon Oxide Film (PorousSiO₂ Film)

The thickness of the porous interlayer insulation film 38 is, forexample, 160 nm. Specifically, for example, the formation is performedin the following manner.

1) First, an insulation film material for forming the porous interlayerinsulation film 38 is prepared (step 5A-1). Examples of the startingmaterial to be used include tetraalkoxysilane, trialkoxysilane,methyltrialkoxysilane, ethyltrialkoxysilane, propyltrialkoxysilane,phenyltrialkoxysilane, vinyltrialkoxysilane, allyltrialkoxysilane,glycidyltrialkoxysilane, dialkoxysilane, dimethyldialkoxysilane,diethyldialkoxysilane, dipropyldialkoxysilane, diphenyldialkoxysilane,divinyldialkoxysilane, diallyldialkoxysilane, diglycidyldialkoxysilane,phenylmethyldialkoxysilane, phenylethyldialkoxysilane,phenylpropyltrialkoxysilane, phenylvinyldialkoxysilane,phenylallyldialkoxysilane, phenylglycidyldialkoxysilane,methylvinyldialkoxysilane, ethylvinyldialkoxysilane, andpropylvinyldialkoxysilane. The starting material is subjected tohydrolysis or polycondensation to give a polymer, and a thermallydecomposable compound is added to the resulting polymer to obtain aliquid insulation film material. As the thermally decomposable compound,for example, an acrylic resin or the like is used.

2) Next, the insulation film material obtained in step 5-1 is applied tothe entire surface of the substrate, for example, by spin-coating (step5-2). The spin-coating is performed, for example, at 3,000 rpm for 30seconds.

3) Next, heat treatment (soft bake process) is performed (step 5-3). Inthe heat treatment, for example, a hot plate (not shown) is used. Thethermally decomposable compound is thermally decomposed by thistreatment, and pores (voids) are formed in the interlayer insulationfilm 38. The diameter of the pores is, for example, about 10 to 20 nmThe heat treatment temperature is set at 200° C. to 350° C. The reasonfor setting the heat treatment temperature at 200° C. to 350° C. is asfollows.

When the heat treatment temperature is set lower than 200° C., thethermally decomposable compound is not sufficiently thermallydecomposed, and pores are not formed sufficiently. Furthermore, when theheat treatment temperature is set lower than 200° C., the thermaldecomposition rate of the thermally decomposable compound is very slow,and a long period of time is required for forming pores. On the otherhand, when the heat treatment temperature is set higher than 350° C.,curing of the insulation film material advances rapidly, and theformation of pores is inhibited. For this reason, it is preferably toset the heat treatment temperature at 200° C. to 350° C. Here, the heattreatment temperature is set, for example, at 200° C. Thereby, theinterlayer insulation film 38 made of the porous silicon oxide film isformed over the entire surface of the substrate.

(B) Interlayer Insulation Film Made of Porous Silicon Oxide FilmContaining Carbon (Porous Carbon-Doped SiO₂ Film)

Specifically, for example, the formation is performed in the followingmanner.

1) First, the semiconductor substrate 10 is placed into a chamber of aplasma-enhanced CVD apparatus (not shown) (step 5B-1). As theplasma-enhanced CVD apparatus, for example, a parallel-plate-typeplasma-enhanced CVD apparatus is used.

2) Next, the temperature of the substrate is set, for example, at 300°C. to 400° C. (step 5B-2).

3) Next, a reactive gas is introduced into the chamber (step 5B-3).Specifically, first, a siloxane monomer having alkyl groups is vaporizedby a vaporizer (not shown) so as to generate the reactive gas. Then, thereactive gas is introduced into the chamber using a carrier gas. In thisstage, when high-frequency power is applied between plate electrodes(not shown), plasma of the reactive gas is generated. By setting thedeposition rate relatively high, the porous interlayer insulation film38 can be formed.

For example, under the following deposition conditions, the porousinterlayer insulation film 38 can be formed. As the reactive gas, forexample, hexamethyldisiloxane is used. The feed rate of the reactive gasis, for example, 3 mg/min. As the carrier gas, CO₂ is used. The flowrate of the carrier gas is, for example, 6,000 sccm. The high-frequencypower applied between plate electrodes is, for example, 13.56 MHz (500W) and 100 kHz (500 W). Thereby, the porous interlayer insulation film38 made of silicon oxide film containing carbon is formed.

Furthermore, the interlayer insulation film 38 made of a porous siliconoxide film containing carbon may be formed using a starting materialcontaining thermally decomposable atomic groups (thermally decomposablecompound) or oxidatively decomposable atomic groups (oxidativelydecomposable compound) as will be described below. In this method, thefilm is formed with the thermally decomposable or oxidativelydecomposable atomic groups being decomposed by plasma.

1) First, the semiconductor substrate 10 is placed into a chamber of aplasma-enhanced CVD apparatus (not shown) (step 5B′-1). As theplasma-enhanced CVD apparatus, for example, a parallel-plate-typeplasma-enhanced CVD apparatus is used.

2) Next, the temperature of the substrate is set, for example, at 250°C. to 350° C. (step 5B′-2).

3) Next, reactive gases are introduced into the chamber (step 5B′-3).Specifically, first, a siloxane monomer having alkyl groups is vaporizedby a vaporizer so as to generate a first reactive gas. A silane compoundcontaining phenyl groups is vaporized by a vaporizer so as to generate asecond reactive gas. The phenyl group is an atomic group (thermallydecomposable and oxidatively decomposable atomic group) which isdecomposed when subjected to an oxidation reaction under heating. Then,these reactive gases are introduced into the chamber using CO₂ gas as acarrier gas. In this stage, when high-frequency power is applied betweenplate electrodes (not shown), the CO₂ gas is converted into plasma(oxygen plasma) to decompose the phenyl groups. Since the interlayerinsulation film 38 is deposited with the phenyl groups being decomposed,the porous interlayer insulation film 38 is formed.

Deposition conditions are set, for example, as follows. As the firstreactive gas, more specifically, for example, hexamethyldisiloxane isused. The feed rate of the first reactive gas is, for example, 1 mg/min.As the second reactive gas, more specifically, for example,diphenylmethylsilane is used. The feed rate of the second reactive gasis, for example, 1 mg/min. The flow rate of the carrier gas is, forexample, 3,000 sccm. The high-frequency power applied between plateelectrodes is, for example, 13.56 MHz (300 W) and 100 kHz (300 W).Thereby, the interlayer insulation film 38 made of the porous siliconoxide film containing carbon is formed.

The example in which a material that is decomposed when subjected tooxidation under heating (material containing thermally decomposable andoxidatively decomposable atomic groups) has been described above.However, the porous interlayer insulation film 38 may be formed by vapordeposition using a starting material containing atomic groups that canbe thermally decomposed without being oxidized or a starting materialcontaining atomic groups that can be oxidatively decomposed withoutbeing heated.

(C) Porous Interlayer Insulation Film Made of Organic Compound (PorousOrganic Film)

Specifically, for example, the formation is performed in the followingmanner.

1) First, a polyaryl ether polymer containing a thermally decomposableorganic compound is diluted with a solvent to form an insulation filmmaterial (step 5C-1). As the thermally decomposable organic compound, anorganic compound that is thermally decomposed, for example, at 200° C.to 300° C. is used. Examples of such an organic compound include acrylicresins, polyethylene resins, polypropylene resins, acrylic oligomers,ethylene oligomers, and propylene oligomers. As the solvent, forexample, cyclohexanone is used.

2) Next, the insulation film material prepared in step 5C-1 is appliedto the entire surface of the substrate by spin-coating (step 5C-2).

3) Next, heat treatment is performed using a hot plate (not shown) (step5C-3). The heat treatment temperature is, for example, 100° C. to 400°C. Thereby, the solvent in the interlayer insulation film 38 isvaporized, and a dry interlayer insulation film 38 is obtained.

4) Then, the substrate obtained in step 5C-3 is placed into a curingoven (not shown) to perform heat treatment (step 5C-4). The heattreatment temperature is, for example, 300° C. to 400° C. Thereby, thethermally decomposable organic compound is thermally decomposed, andpores are formed in the interlayer insulation film 38.

(D) Porous Interlayer Insulation Film Made of Silicon Cluster-ContainingInsulating Material

Specifically, for example, the formation is performed in the followingmanner.

1) First, an insulation film material containing clusters of silica(silica cluster precursor) is prepared (step 5D-1). As such aninsulation film material, for example, Nano-Clustering Silica (NCS)(type: CERAMATE NCS) manufactured by Catalysts & Chemicals Ind. Co.,Ltd. can be used.

2) Next, the insulation film material is applied to the entire surfaceof the substrate by spin-coating (step 5D-2). The spin-coating isperformed, for example, at 3,000 rpm for 30 seconds.

3) Next, heat treatment (soft bake process) is performed (step 5D-3). Inthe heat treatment, for example, a hot plate (not shown) is used. Theheat treatment temperature is, for example, 200° C., and the heattreatment time is, for example, 150 seconds. Thereby, the solvent in theinsulation film material is vaporized, and the porous interlayerinsulation film 38 is formed. Since the interlayer insulation film 38 isformed using the insulation film material containing clusters of silica,the porous interlayer insulation film 38 having fine pores is formed.Specifically, the diameter of the pores is, for example, 2 nm or less.Furthermore, since the interlayer insulation film 38 is formed using theinsulation film material containing clusters of silica, the distributionof pores is highly uniform. By forming the interlayer insulation film 38using the insulation film material containing clusters of silica, it ispossible to form a porous interlayer insulation film 38 having very goodquality. Thus, the porous interlayer insulation film made of the siliconcluster-containing insulating material can be formed.

Here, the example in which the insulation film material containing asilicon compound as a cluster compound has been described. However, thecluster compound is not limited to the silicon compound.

Step 6

As shown in FIG. 6, the porous insulation film 38 is selectivelyirradiated with an energy beam. As the energy beam, for example, anelectron beam, ultraviolet light, or the like can be used. Theirradiation of electron beam (A) and the irradiation of ultravioletlight (B) are performed as follows.

(A) Irradiation of Electron Beam

1) First, the semiconductor device 10 formed in step 5 is placed into achamber of an electron beam irradiation apparatus (not shown) (step6A-1).

2) Next, the chamber is evacuated to obtain a vacuum state (step 6A-2).At this stage, to adjust the pressure in the chamber or to modify theinsulation film 40, etc., a gas may be introduced into the chamber. Asthe gas to be introduced into the chamber, for example, nitrogen gas,argon gas, helium gas, methane gas, or ethane gas can be used.

3) Next, the porous insulation film 38 is selectively irradiated with anelectron beam 100 (step 6A-3). For example, as shown in FIG. 6, scanningwith the electron beam 100 is performed using a high-voltage generatingcircuit 150, a lens excitation circuit 160, an electron beam-scanningcircuit 170, etc., so that the porous insulation film 38 is selectivelyirradiated with the electron beam 100.

When the electron beam 100 is applied to the porous insulation film 38,the portion of the porous interlayer insulation film 38 irradiated withthe electron beam 100 is cured to lose the porous property.Specifically, pores present in the porous interlayer insulation film 38disappear, and the mechanical strength is increased by the disappearanceof the pores. On the other hand, the phenomenon of disappearance ofpores leads to an increase in the relative dielectric constant of theinterlayer insulation film 38. Consequently, in this embodiment, theelectron beam 100 is selectively applied only to the “portion with lowwiring density” other than the portion in which it is not necessary toincrease the mechanical strength (portion with high wiring density) inthe interlayer insulation film 38.

Specifically, a portion in which the distance between wires is minimumin the device (or in the wiring layer where the wires are present) isidentified, and the identified portion and its surrounding portion arespecified as a “non-irradiation area”. The electron beam 100 is appliedonly to the area other than the “non-irradiation area”.

The “non-irradiation area” is defined as the same as that described withreference to FIG. 1. That is, among wires 50 in the interlayerinsulation film 38, a portion in which the wiring pitch P is minimum(P=L) is identified. The identified wiring portion combined with thespaces between the wires is defined as the “minimum-pitched wiringarea”. In this case, the non-irradiation area, for example, correspondsto an area obtained by extending the periphery of the “minimum-pitchedwiring area” by a predetermined distance. The “predetermined distance”may be set, for example, at a half of the minimum pitch between wires(L/2).

Furthermore, the non-irradiation area may be set as shown in FIGS. 1 and6. That is, the “minimum-pitched wiring area” is extended by a distanceof L/2 from the center of the outermost wire, and the extended area isset as the non-irradiation area. Note that the non-irradiation area maybe set as the same as the “minimum-pitched wiring area”.

Furthermore, the non-irradiation area may be set as an area includingall the wires 50 in the first wiring layer and its surrounding area.Specifically, the non-irradiation area is defined as an area obtained byextending by a “predetermined distance” in the width direction of thewires 50 from the center of the wires 50 with respect to all wires 50 inthe first wiring layer. (Hereinafter, the “predetermined distance” is,for convenience sake, referred to as the “non-irradiation width”.) Here,the “non-irradiation width” can be set, for example, at a half of theminimum pitch between wires (L/2). When the “non-irradiation area” isset with respect to all wires in one layer as described above, it is notnecessary to perform the step of specifying a portion of the wiring, andthus the non-irradiation area can be set easily, which is advantageous.

Furthermore, the “non-irradiation area” may be set as an area obtainedby extending, by the non-irradiation width from the center of the wire50 in the width direction of the wire 50, the “identified wiringportion”. In such a case, it is also possible to set the non-irradiationwidth, for example, at a value of L/2. From the standpoint of avoidingfinely subdividing the non-irradiation area, the non-irradiation widthis preferably set at a value equal to or larger than L/2.

As described above, since the electron beam is not applied to theportion in which the dielectric constant must be low (densely wiredportion) in the porous interlayer insulation film 38, the porous stateis not modified, and the low dielectric constant is maintained.

Preferably, the electron beam 100 is applied while performing heattreatment. The heat treatment temperature is, for example, 200° C. to450° C. When the electron beam 100 is applied while performing heattreatment, curing of the interlayer insulation film 38 is promoted, andthe mechanical strength of the porous interlayer insulation film 38 canbe improved.

The acceleration voltage in the irradiation with the electron beam 100is, for example, 10 to 20 keV. When the acceleration voltage is lowerthan 10 keV, it takes a long period of time for the porous interlayerinsulation film 38 to be cured. When the acceleration voltage is higherthan 20 keV, the porous interlayer insulation film 38 is greatlydamaged. As a result, the hygroscopicity of the porous interlayerinsulation film 38 may be increased, or the porous interlayer insulationfilm 38 may be shrunk, resulting in an unnecessary increase in therelative dielectric constant and degradation in flatness. Consequently,the acceleration voltage for the irradiation with the electron beam 100is preferably about 10 to 20 keV.

The acceleration voltage for the irradiation with the electron beam 100is not limited to 10 to 20 keV. When a certain period of time is allowedfor the porous interlayer insulation film 38 to be cured, theacceleration voltage may be set lower than 10 keV. Even when theacceleration voltage is set higher than 20 keV, by setting theirradiation time of the electron beam 100 shorter, the porous interlayerinsulation film 38 can be prevented from being damaged excessively.Thus, even when the acceleration voltage is set higher than 20 key, bysetting the irradiation time of the electron beam 100 shorter, it ispossible to prevent an increase in the hygroscopicity of the porousinterlayer insulation film 38 and to prevent the shrinkage of the porousinterlayer insulation film 38.

(B) Irradiation of Ultraviolet Light

1) First, the semiconductor device 10 is placed into a chamber providedwith an ultraviolet lamp (not shown) (step 6B-1). As the ultravioletlame, for example, a high-pressure mercury lamp is used.

2) Next, the chamber is evacuated to obtain a vacuum state (step 6B-2).At this stage, to adjust the pressure in the chamber or to modify theinsulation film 40, etc., a gas may be introduced into the chamber. Asthe gas to be introduced into the chamber, for example, nitrogen gas orinert gas is used. As the inert gas, for example, argon gas is used.

3) Next, the porous insulation film 38 is selectively irradiated withultraviolet light 101 (step 6B-3). In the irradiation with ultravioletlight 101, for example, a photomask 110 as shown in FIG. 6 is used. Thephotomask 110, for example, has a structure in which a glass plate 112is partially covered with a chrome pattern 114. The ultraviolet light101 is selectively applied through the photomask 110 to the exposedsurface of the porous insulation film 38 in such a manner. When theultraviolet light 101 is applied to the porous interlayer insulationfilm 38, the portion of the porous interlayer insulation film 38irradiated with the ultraviolet light 101 is cured to lose the porousproperty.

Specifically, pores present in the porous interlayer insulation film 38disappear, and the mechanical strength is increased by the disappearanceof the pores. On the other hand, the phenomenon of disappearance ofpores leads to an increase in the relative dielectric constant of theinterlayer insulation film 38. Consequently, in this embodiment, theultraviolet light 101 is selectively applied only to the “portion withlow wiring density” other than the portion in which it is not necessaryto increase the mechanical strength (portion with high wiring density)in the interlayer insulation film 38.

The area to which the ultraviolet light 101 is applied is set in thesame manner as in step 6A-3 described above.

Preferably, the ultraviolet light 101 is applied to the porousinterlayer insulation film 38 while performing heat treatment. The heattreatment temperature is, for example, 200° C. to 450° C. When theultraviolet light 101 is applied while performing heat treatment, curingof the interlayer insulation film 38 is promoted, and the mechanicalstrength of the interlayer insulation film 38 can be improved.

Although the example in which irradiation of the ultraviolet light 101is performed in a vacuum state has been described above, the pressureduring the irradiation of the ultraviolet light 101 is not limited tothe vacuum. For example, irradiation of the ultraviolet light 101 may beperformed at normal pressure.

As described above, by the selective irradiation of the interlayerinsulation film 38 with the energy beam, with respect to the interlayerinsulation film 38 including the wiring, the mechanical strength is madeuniform and the wiring capacitance is also made uniform.

In FIG. 6, for convenience sake, the means for irradiation of theelectron beam 100 and the means for irradiation of the ultraviolet light101 are both shown. However, when the irradiation of the energy beam isperformed, either one of these means is used. In the drawings subsequentto FIG. 6, for convenience sake, the means for irradiation of theelectron beam 100 is omitted, and the means for irradiation of theultraviolet light 101 only is shown.

Step 7

As shown in FIG. 7, a highly dense insulation film (second insulationfilm) 40 is formed over the entire surface of the semiconductorsubstrate 10 provided with the porous interlayer insulation film 38.Examples of the method for forming the insulation film 40 include (A) afilm formation method by plasma-enhanced CVD, (B) a film formationmethod by vapor-phase growth, and (C) a film formation method byspin-coating. These film formation methods will be described below insequence.

(A) Film Formation Method by Plasma-Enhanced CVD

A method for forming the insulation film 40 made of a silicon oxide filmusing plasma-enhanced CVD will be described below.

1) First, the semiconductor substrate 10 is placed into a chamber of aplasma-enhanced CVD apparatus (not shown) (step 7A-1). As theplasma-enhanced CVD apparatus, for example, a parallel-plate-typeplasma-enhanced CVD apparatus is used.

2) Next, the temperature of the substrate is set, for example, at 400°C. (step 7A-2).

3) Next, a reactive gas is introduced into the chamber (step 7A-3).Specifically, first, trimethylsilane is vaporized by a vaporizer (notshown) so as to generate the reactive gas. Then, the reactive gas isintroduced into the chamber using an inert gas as a carrier. In thisstage, when high-frequency power is applied between plate electrodes(not shown), plasma of the reactive gas is generated.

In this stage, by setting the deposition rate relatively low, it ispossible to form a highly dense insulation film 40. Specifically, forexample, under the deposition conditions described below, it is possibleto form the highly dense insulation film 40. The feed rate of thereactive gas is, for example, 1 mg/min. As the inert gas as the carrier,for example, CO₂ is used. The flow rate of the inert gas is, forexample, 100 sccm. The high-frequency power applied between plateelectrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). Thetime for applying high-frequency power between plate electrodes togenerate plasma is, for example, 5 seconds.

When the insulation film 40 made of the silicon oxide film is formedunder the conditions described above, the density of the insulation film40 is, for example, about 2 g/cm³. Here, the thickness of the insulationfilm 40 is set, for example, at 30 nm. Thereby, the insulation film 40composed of the silicon oxide film is formed.

Furthermore, as the insulation film 40, a carbon-doped silicon oxidefilm may be formed. In order to form the carbon-doped silicon oxide film(carbon-doped SiO₂ film), in step 7A-3 described above, as the startingmaterial for generating the reactive gas, hexamethyldisiloxane([(CH₃)₃Si]₂O) is used. That is, hexamethyldisiloxane is vaporized by avaporizer (not shown) so as to generate the reactive gas. Since theprocedure other than the use of hexamethyldisiloxane as the startingmaterial for generating the reactive gas is the same as that accordingto steps 7A-1 to 7A-3, a description thereof will be omitted.

(B) Film Formation Method by Vapor-Phase Growth

A method for forming the insulation film 40 made of a hydrogenated SiCfilm (SiC:H film) will be described below.

1) First, the semiconductor substrate 10 is placed into a chamber of aplasma-enhanced CVD apparatus (not shown). As the plasma-enhanced CVDapparatus, for example, a parallel-plate-type plasma-enhanced CVDapparatus is used (step 7B-1).

2) Next, the temperature of the substrate is set, for example, at 400°C. (step 7B-2).

3) Next, a reactive gas is introduced into the chamber (step 7B-3).Specifically, first, trimethylsilane is vaporized by a vaporizer (notshown) so as to generate the reactive gas. Then, the reactive gas isintroduced into the chamber using a carrier gas. In this stage, whenhigh-frequency power is applied between plate electrodes (not shown),plasma of the reactive gas is generated.

In this stage, by setting the deposition rate relatively low, it ispossible to form a highly dense insulating film 40. Specifically, forexample, under the deposition conditions described below, it is possibleto form the highly dense insulating film 40. The feed rate of thereactive gas is, for example, 1 mg/min. As the inert gas as the carrier,for example, nitrogen (N₂) is used. The flow rate of the inert gas is,for example, 1,000 sccm. The high-frequency power applied between plateelectrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). Thetime for applying high-frequency power between plate electrodes togenerate plasma is, for example, 5 seconds.

Furthermore, as the insulation film 40, a nitrogen-doped SiC film may beformed. In order to form the nitrogen-doped SiC film, in step 7B-3described above, ammonia (NH₃) is used as the inert gas. Since theprocedure other than the use of ammonia as the inert gas is the same asthat according to steps 7B-1 to 7B-3, a description thereof will beomitted.

Furthermore, as the insulation film 40, an oxygen-doped hydrogenated SiCfilm (SiC:O:H film) may be formed. The oxygen-doped hydrogenated SiCfilm is a SiC film in which oxygen atoms (O) and hydrogen atoms (H) arepresent. In order to form the oxygen-doped hydrogenated SiC film, instep 7B-3 described above, carbon dioxide (CO₂) is used as the inertgas. Since the procedure other than the use of carbon dioxide as theinert gas is the same as that according to steps 7B-1 to 7B-3, adescription thereof will be omitted.

(C) Film Formation Method by Spin-Coating

A method for forming the insulation film 40 made of an organic SOG filmusing spin-coating will be described below.

1) First, an insulation film material for forming the organic SOG filmis prepared (step 7C-1). In order to obtain such an insulation filmmaterial, for example, tetraethoxysilane and methyltriethoxysilane areused as starting materials. The starting materials are subjected tohydrolysis and condensation to produce a polymer. The resulting polymeris used as the insulation film material.

2) Next, the insulation film material obtained in step 7C-1 is appliedto the entire surface of the substrate by spin-coating (step 7C-2). Thespin-coating is performed, for example, at 3,000 rpm for 30 seconds.

3) Next, heat treatment (soft bake process) is performed (step 7C-3). Inthe heat treatment, for example, a hot plate (not shown) is used. Theheat treatment temperature is, for example, 200° C., and the heattreatment time is, for example, 150 seconds. Thereby, the insulationfilm 40 made of the organic SOG film is formed.

Furthermore, as the insulation film 40, an inorganic SOG film may beused. In order to form the inorganic SOG film, in step 7C-1 describedabove, tetraethoxysilane is used as the starting material for theinsulation film material. Since the procedure other than the use oftetraethoxysilane as the starting material for the insulation filmmaterial is the same as that according to steps 7C-1 to 7C-3, adescription thereof will be omitted.

Step 8

As shown in FIG. 8, trenches 46 for embedding wires are formed in theinsulation film 40, the interlayer insulation film 38, and theinsulation film 36 using photolithography. Specifically, for example,the formation is performed in the following manner.

1) First, a photoresist film 42 is formed over the entire surface of thesubstrate, for example, by spin-coating (step 8-1).

2) Next, openings 44 are formed in the photoresist film 42 usingphotolithography (step 8-2). The openings 44 are used for forming wires50 in the first layer (first metal wires). For example, the openings 44are formed in the photoresist film 42 such that the wiring width is 100nm and the wiring pitch is 100 nm.

3) Next, using the photoresist film 42 as a mask, the insulation film40, the interlayer insulation film 38, and the insulation film 36 areetched (step 8-3). The etching is performed using fluorine plasmagenerated from CF₄ gas and CHF₃ gas. At this stage, the stopper film 28functions as an etching stopper. Thereby, the trenches 46 for embeddingthe wires are formed in the insulation film 40, the interlayerinsulation film 38, and the insulation film 36. The upper surfaces ofthe conductor plugs 34 are exposed to the trenches 46. Then, thephotoresist film 42 is removed.

Step 9

As shown in FIG. 9, after wires 50 are formed in the trenches 46, aninsulation film 52 serving as a barrier film is formed. Specifically,for example, the formation is performed in the following manner.

1) First, a laminated film 48 including a barrier film and a seed filmis formed (step 9-1). Specifically, first, a barrier film (not shown)made of TaN with a thickness of 10 nm is formed over the entire surfaceof the substrate, for example, by sputtering. The barrier film preventsCu in the wires, which will be described below, from being diffused intothe insulation films. Next, a seed film (not shown) made of Cu with athickness of 10 nm is formed over the entire surface of the substrate,for example, by sputtering. The seed film functions as an electrode whenwires made of Cu are formed by electroplating. Thus, the laminated film48 including the barrier film and the seed film is formed.

2) Next, a Cu film 50 with a thickness of 600 nm is formed, for example,by electroplating (step 9-2).

3) Next, the Cu film 50 and the laminated film 48 are polished, forexample, by CMP until the surface of the insulation film is exposed(step 9-3). Thus, the wires 50 made of Cu are embedded in the trenches.Such a process of forming the wires 50 is referred to as a singledamascene process.

4) Next, an insulation film 52 made of an oxygen-doped hydrogenated SiCfilm with a thickness of 30 nm is formed over the entire surface of thesubstrate, for example, by plasma-enhanced CVD (step 9-4). Theinsulation film 52 functions as a barrier film that prevents diffusionof moisture. Moisture is prevented from reaching the porous interlayerinsulation film 38 by the insulation film 52.

The oxygen-doped hydrogenated SiC film is formed, for example, by thefollowing steps. First, the semiconductor substrate 10 is placed into achamber of a plasma-enhanced CVD apparatus (not shown) (step 9-4-1). Asthe plasma-enhanced CVD apparatus, for example, a parallel-plate-typeplasma-enhanced CVD apparatus is used. Next, the temperature of thesubstrate is set, for example, at 400° C. (step 9-4-2). Next,trimethylsilane is vaporized by a vaporizer so as to generate a reactivegas (step 9-4-3). Then, the reactive gas is introduced into the chamberusing a carrier gas (step 9-4-4). In this stage, when high-frequencypower is applied between plate electrodes (not shown), plasma of thereactive gas is generated.

In this stage, by setting the deposition rate relatively low, it ispossible to form a highly dense insulating film 52. Specifically, forexample, under the deposition conditions described below, it is possibleto form the highly dense insulating film 52. The feed rate of thereactive gas is, for example, 1 mg/min. As the carrier gas, for example,CO₂ is used. The flow rate of the carrier gas is, for example, 100 sccm.The high-frequency power applied between plate electrodes is, forexample, 13.56 MHz (200 W) and 100 kHz (200 W). The time for applyinghigh-frequency power between plate electrodes to generate plasma is, forexample, 5 seconds. Thereby, the insulation film 52 functioning as thebarrier film is formed.

Step 10

As shown in FIG. 10, after a porous interlayer insulation film 54 isformed, an energy beam is selectively applied to the interlayerinsulation film 54. Specifically, for example, the formation isperformed in the following manner.

1) First, the interlayer insulation film 54 is formed. The interlayerinsulation film 54 is formed, for example, by the same method as thatfor forming the interlayer insulation film 38 described above (step10-1). The thickness of the interlayer insulation film 54 is, forexample, 140 nm.

2) Next, scanning of an electron beam 100 is performed, for example,using the apparatus as shown in FIG. 6, and the “electron beam 100” isselectively applied to the interlayer insulation film 54 (step 10-2).The irradiation of the electron beam 100 is performed under the sameconditions as those in the case in which the interlayer insulation film38 is irradiated with the electron beam 100 (step 6A-3).

Instead of irradiation with the “electron beam 100”, irradiation of“ultraviolet light 101” may be performed using a photomask 120 as shownin FIG. 10. That is, the “ultraviolet light 101” is selectively appliedto the portion with low wiring density in the porous interlayerinsulation film 54. The irradiation of the ultraviolet light 101 isperformed under the same conditions as those in the case in which theinterlayer insulation film 38 is irradiated with the ultraviolet light101 (step 6B-3).

As described above, by the selective irradiation of the interlayerinsulation film 54 with the energy beam, with respect to the interlayerinsulation film 54 including the wiring, the mechanical strength is madeuniform and the wiring capacitance is also made uniform.

Step 11

As shown in FIG. 11, an insulation film 56 and a stopper film 57 areformed on the interlayer insulation film 54. First, the insulation film56 is formed (step 11-1).

The insulation film 56 is a highly dense film. Specifically, theinsulation film 56 is formed over the entire surface of the porousinterlayer insulation film 54. The insulation film 56 is formed, forexample, by the same method as that for the insulation film 40 describedabove. As the material for the insulation film 56, for example, anoxygen-doped hydrogenated SiC film is used. The thickness of theinsulation film 56 is, for example, 30 nm.

Next, using photolithography, the stopper film 57, for example, made ofa silicon nitride film (SiN_(X)) is formed (step 11-2). The stopper film57 functions as an etching stopper when contact holes 66 are formed inan interlayer insulation film 58, etc. in the step described below. Asthe stopper film 57, a silicon thermal oxide film (SiO₂) or the likethat has different etching characteristics from the interlayerinsulation film 58, which will be described below, may also be used.

Step 12

As shown in FIG. 12, after the porous interlayer insulation film 58 isformed, an energy beam is selectively applied to the interlayerinsulation film 58. Specifically, for example, the formation isperformed in the following manner.

1) First, the interlayer insulation film 58 is formed. The interlayerinsulation film 58 is formed, for example, by the same method as thatfor forming the interlayer insulation film 38 descried above (step12-1). The thickness of the interlayer insulation film 58 is, forexample, 140 nm.

2) Next, scanning of an electron beam 100 is performed using theapparatus as shown in FIG. 12, and the “electron beam 100” isselectively applied to the interlayer insulation film 58 (step 12-2).The irradiation of the electron beam 100 is performed under the sameconditions as those in the case in which the interlayer insulation film38 is irradiated with the electron beam 100 (step 6A-3). Here, theirradiation of the interlayer insulation film 58 with the electron beam100 is performed on the basis of the arrangement of wires 76 a, whichwill be described below, and, for example, areas shown in FIG. 12 areirradiated.

Instead of irradiation with the “electron beam 100”, irradiation of“ultraviolet light 101” may be performed using a photomask 120 as shownin FIG. 12. That is, the “ultraviolet light 101” is selectively appliedto the portion with low wiring density in the porous interlayerinsulation film 58. The irradiation of the ultraviolet light 101 isperformed under the same conditions as those in the case in which theinterlayer insulation film 38 is irradiated with the ultraviolet light101 (step 6B-3). The irradiation of the interlayer insulation film 58with the ultraviolet light 101 is performed on the basis of thearrangement of wires 76 a, which will be described below, and, forexample, areas shown in FIG. 12 are irradiated.

As described above, by the selective irradiation of the interlayerinsulation film 58 with the energy beam, with respect to the interlayerinsulation film 58 including the wiring, the mechanical strength is madeuniform and the wiring capacitance is also made uniform.

Step 13

As shown in FIG. 13, an insulation film 60 is formed on the interlayerinsulation film 58. The insulation film 60 is a highly dense film. Theinsulation film 60 is formed over the entire surface of the interlayerinsulation film 58. The insulation film 60 is formed, for example, bythe same method as that for the insulation film 40 described above. Asthe material for the insulation film 60, for example, an oxygen-dopedhydrogenated SiC film is used. The thickness of the insulation film 60is, for example, 30 nm.

Step 14

As shown in FIG. 14, using photolithography, trenches 64 for embeddingwires are formed in the insulation films 52, 56, and 60 and theinterlayer insulation films 52 and 58. Specifically, for example, theformation is performed in the following manner.

1) First, a photoresist film 62 is formed over the entire surface of thesubstrate, for example, by spin-coating (step 14-1).

2) Next, openings 64 are formed in the photoresist film 62 usingphotolithography (step 14-2). The openings 64 are used for formingcontact holes 64 that extend to the wires 50.

3) Next, using the photoresist film 62 as a mask, the insulation film60, the interlayer insulation film 58, the insulation film 56, theinterlayer insulation film 54, and the insulation film 52 are etched(step 14-3). The etching is performed using fluorine plasma generatedfrom CF₄ gas and CHF₃ gas. By appropriately changing the compositionratio of the etching gas, the pressure during etching, and the like, itis possible to perform etching on the insulation film 60, the interlayerinsulation film 58, the insulation film 56, the interlayer insulationfilm 54, and the insulation film 52. Thereby, contact holes 66 thatreach the wires 50 are formed. After the contact holes 66 are formed,the photoresist film 62 is removed.

Step 15

As shown in FIG. 15, using photolithography, trenches 72 for embeddingwires are formed in the insulation film 60, the interlayer insulationfilm 58, and the insulation film 56. Specifically, for example, theformation is performed in the following manner.

1) First, openings 70 are formed in a photoresist film 68 (step 15-1).The openings 70 are used for forming wires 76 a in the second layer(second metal wires), which will be described below.

2) Next, using the photoresist film 68 as a mask, the insulation film60, the interlayer insulation film 58, and the insulation film 56 areetched (step 15-2). The etching is performed using fluorine plasmagenerated from CF₄ gas and CHF₃ gas. Thereby, the trenches 72 forembedding the wires 76 a in the insulation film 60, the interlayerinsulation film 58, and the insulation film 56 are formed. The trenches72 are connected to the contact holes 66.

In steps 14 and 15, the example in which the contact holes 66 are formedfirst, and then the trenches 72 are formed has been described. However,the trenches 72 may be formed first, and then the contact holes 66 maybe formed. In such a case, first, using photolithography, trenches 72are formed in the insulation film 60, the interlayer insulation film 58,and the insulation film 56. Next, a photoresist film (not shown) isformed on the substrate provided with the trenches 72 so as to fill thetrenches 72. Then, using photolithography, contact holes that reach thewires 50 are formed in the interlayer insulation film 54 and theinsulation film 52. When the contact holes 66 and the trenches 72 areformed by carrying out such a step, the stopper 57 is not required.

Step 16

As shown in FIG. 16, after wires 76 a and conductor plugs 76 b areformed in the trenches 72, an insulation film that functions as abarrier film is formed. Specifically, for example, the formation isperformed in the following manner.

1) First, a laminated film 74 including a barrier film and a seed filmis formed (step 16-1). Specifically, first, a barrier film (not shown)made of TaN with a thickness of 10 nm is formed over the entire surfaceof the substrate, for example, by sputtering. The barrier film preventsCu in the wires 76 a and conductor plugs 76 b, which will be describedbelow, from being diffused into the insulation films. Next, a seed film(not shown) made of Cu with a thickness of 10 nm is formed over theentire surface of the substrate, for example, by sputtering. The seedfilm functions as an electrode when the wires 76 a and conductor plugs76 b made of Cu are formed by electroplating. Thus, the laminated film74 including the barrier film and the seed film is formed.

2) Next, a Cu film 76 with a thickness of 1,400 nm is formed, forexample, by electroplating (step 16-2).

3) Next, the Cu film 76 and the laminated film 74 are polished, forexample, by CMP until the surface of the insulation film 60 is exposed(step 16-3). Thus, the conductor plugs 76 b made of Cu are embedded inthe contact holes 66 and the wires 76 a made of Cu are embedded in thetrenches 72. The conductor plugs 76 b and the wires 76 a are integrallyformed. Such a process in which the conductor plugs 76 b and the wires76 a are formed simultaneously is referred to as a dual damasceneprocess.

4) Next, an insulation film 78 made of an oxygen-doped hydrogenated SiCfilm with a thickness of 30 nm is formed over the entire surface of thesubstrate, for example, by plasma-enhanced CVD (step 16-4). Theinsulation film 78 is formed, for example, by the same method as thatfor forming the insulation film 36 described above (steps 4-1 to 4-3).The insulation film 78 functions as a barrier film that preventsdiffusion of moisture. Then, by appropriately repeating the similarsteps described above, wires in a third layer (third metal wiringlayer), which is not shown, are formed. Thereby, the semiconductordevice according to this embodiment is fabricated.

As described above, in this embodiment, after each of the porousinterlayer insulation films 38, 54, and 58 is formed, the energy beam isapplied to the portion with low wiring density in each of the interlayerinsulation films 38, 54, and 58, and thus some area (portion with lowwiring density) of each of the porous interlayer insulation films 38,54, and 58 is cured. On the other hand, the portion with high wiringdensity in each of the interlayer insulation films 38, 54, and 58 is notirradiated with the electron beam 100 or ultraviolet light 101 so as tomaintain its porous property.

Consequently, according to this embodiment, the mechanical strength isincreased only in the portions with low wiring density (portions havinglow mechanical strength and low wiring capacitance) of the interlayerinsulation films 38, 54, and 58. Thus, the mechanical strength is madeuniform over the entire films. At the same time, the wiring capacitanceis increased only in the portions with low wiring density of theinterlayer insulation films 38, 54, and 58. Thus, the wiring capacitanceis also made uniform over the entire films.

In other words, it is possible to avoid the occurrence of cracks in theinterlayer insulation films 38, 54, and 58 when a mechanical stress isapplied from outside, for example, during bonding, and thus reliabilityof the device can be enhanced. It is also possible to maintain lowwiring capacitance over the entire device, to increase the signalpropagation speed, and to achieve higher performance of the device.

Furthermore, in accordance with this embodiment, it is not necessary toform a plurality of types of insulation film for one interlayerinsulation film, and therefore, the fabrication process of thesemiconductor device can be simplified.

Second Embodiment

Experiments were made to check the changes in mechanical strength andrelative dielectric constant (in porous insulation films) when energybeams are applied to the porous insulation films.

Examples 1 to 3 Cases in which Electron Beams were Irradiated

First, an insulation film material was prepared in the following manner(step V1). Specifically, first, 20.8 g (0.1 mol) of tetraethoxysilane,17.8 g (0.1 mol) of methyltriethoxysilane, 23.6 g (0.1 mol) ofglycidoxypropyltrimethoxysilane, and 39.6 g of methyl isobutyl ketonewere placed in a 200-ml reactor (not shown), and 16.2 g of a 1% aqueoussolution of tetrabutyl ammonium hydroxide was added dropwise theretoover 10 minutes (step V1-1). After dropping was completed, an agingreaction was carried out for 2 hours (step V1-2). Subsequently, 5 g ofmagnesium sulfate was added thereto to remove excess moisture (stepV1-3). Then, using a rotary evaporator, ethanol generated during theaging reaction was removed so that the total amount of the reactionsolution was 50 ml (step V1-4). Methyl isobutyl ketone (20 ml) was addedto the resulting reaction solution to give an insulation film material(porous silica precursor) (step V1-5).

Next, the insulation film material prepared in step V1 was applied ontoa silicon wafer (semiconductor substrate) by spin-coating (step V2). Thecoating was performed at a revolution speed of 3,000 rpm with arevolution time of 30 seconds.

Next, using a hot plate, heat treatment (soft bake process) wasperformed at 200° C. to form a porous interlayer insulation film (stepV3). The thickness of the porous insulation film in each example isshown in Table 1 (FIG. 17). The refractive index of the porousinsulation film at this stage is also shown in Table 1.

Next, the porous interlayer insulation film was irradiated with anelectron beam (step V4). The substrate temperature, accelerationvoltage, electron beam irradiation time, and atmosphere in the chamberin this step were set as shown in Table 1.

After curing by electron beam irradiation was performed, the hardness,relative dielectric constant, etc. of the porous interlayer insulationfilm are measured. The results thereof are shown in Table 1.

Comparative Example

A porous interlayer insulation film was formed as in Examples 1 to 3except that step V4 (electron beam curing step) was not performed asshown in Table 1.

The resulting interlayer insulation film was measured, and the resultsshown in Table 1 were obtained. As is evident from Table 1, in Examples1 to 3, the film thickness is decreased and the elastic modulus andhardness are greatly increased compared with Comparative Example. Thismakes it possible to assume that the density of the interlayerinsulation film is increased by the irradiation of electron beam, and asa result, the elastic modulus and hardness of the interlayer insulationfilm are greatly increased. Furthermore, it has also been confirmed thatthe relative dielectric constant is increased by the irradiation ofelectron beam.

Examples 4 to 6 Cases in which Ultraviolet Light was Irradiated

In each of Examples 4 to 6, a porous interlayer insulation film wasformed as in Examples 1 to 3 except that an ultraviolet light curingstep was carried out instead of the electron beam curing step inExamples 1 to 3.

The resulting interlayer insulation film was measured, and the resultsshown in Table 2 (FIG. 18) were obtained. In the case in whichultraviolet light was irradiated, substantially the same results asthose in the case in which the electron beam was irradiated wereobtained. That is, the elastic modulus and hardness of the interlayerinsulation film are greatly increased and the relative dielectricconstant of the interlayer insulation film is also increased by theirradiation of ultraviolet light.

As described above, it has been confirmed that the mechanical strengthis increased and the relative dielectric constant is also increased bythe irradiation of the interlayer insulation film with the energy beam.

Third Embodiment

With respect of a model built on the basis of an actual structure of asemiconductor device, the mechanical strength and relative dielectricconstant of the model were obtained by simulation. The results will beshown below.

FIG. 19 shows a structural model of a semiconductor device (conductorplugs and insulation films not subjected to modification are not shown),and FIG. 20 is a diagram showing conditions for simulation together witha cross-sectional structure. FIG. 21 shows the results of simulationperformed under the conditions shown in FIG. 20. As shown in FIGS. 19and 20, principal components of a semiconductor substrate 80 include asilicon substrate 90, wires 92 a, 92 b, 92 c, and 92 d (first metalwiring layer), wires 94 a, 94 b, 94 c, and 94 d (second metal wiringlayer), wires 96 a, 96 b, 96 c, and 96 d (third metal wiring layer), andinterlayer insulation films 82, 83, 84, 85, and 86.

As shown in FIG. 20, with respect to the interlayer insulation films 82,83, 84, 85, and 86, the Young's modulus of the portion not modified is 8Gpa and the Young's modulus of the modified portion is 15 Gpa. A weightof 1.6 Gpa is applied to the substrate from above. In FIG. 20, in orderto facilitate the understanding of the arrangement of the wires, thesecond metal wiring layer is shown in a manner rotated by 90 degreeswith respect to the actual arrangement.

As a result of simulation under the conditions shown in FIG. 20, theresults shown in Table 3 (FIG. 21) were obtained. Simulation (1) showsthe results of simulation in which a wire having the same shape of thatof the wire 94 b is added to the center of the insulation film 84 shownin FIG. 20. That is, in simulation (1), the case in which the wires werearranged at the minimum wiring pitch so that the wiring density washighest was assumed. With respect to simulations (2) to (4), simulationwas performed on the structure shown in FIG. 20.

As is evident from the results shown in Table 3 (FIG. 20), even when allof the interlayer insulation films 82 to 86 are modified, the wiringcapacitance is lower than that in simulation (1). Thus, it has beenconfirmed that even if the interlayer insulation films are modified,there is no problem in actual use. The maximum stress in Table 3 occursat the interface between the bottom surface of the wire 94 b and theconductor post. By modifying the interlayer insulation films as insimulations (3) and (4), the maximum stress is decreased. It is evidentfrom this that the concentration of stress can be reduced by themodification of the interlayer insulation films.

1. A method for fabricating a semiconductor device comprising the stepsof: forming a porous insulation film and a plurality of wires on thesubstrate, the wires embedded in the porous insulation film having aportion adjacent to the wires and a remote portion spaced apart from thewires; and applying an energy beam to the remote portion to change thestructure of the porous insulation film such that an Young's modulus ofthe porous insulation film increased so as to substantially reinforcethe strength of the porous insulation film.
 2. The method forfabricating the semiconductor device according to claim 1, wherein thewires are made of a metal, and the porous insulation film is made of asilicon oxide film.
 3. The method for fabricating the semiconductordevice according to claim 1, wherein the porous insulation film isformed from a starting material containing silicon, oxygen, andhydrogen.
 4. The method for fabricating the semiconductor deviceaccording to claim 1, wherein a plurality of wiring layers are stacked,each wiring layer including the porous insulation film and the wires,and the portion includes the wires arranged at a minimum pitch.
 5. Themethod for fabricating the semiconductor device according to claim 4,wherein the portion corresponds to a form obtained by extending theperiphery of the minimum-pitched wiring area by a predetermineddistance.
 6. The method for fabricating the semiconductor deviceaccording to claim 1, wherein a plurality of wiring layers are stacked,each wiring layer including the porous insulation film and the wires,and the portion having a form obtained by extending by a predetermineddistance in the width direction of a wire of the wires from the centerof the wire with respect to all wires.
 7. The method for fabricating thesemiconductor device according to claim 6, wherein the predetermineddistance is a half of the minimum pitch.
 8. The method for fabricatingthe semiconductor device according to claim 1, wherein the energy beamis an electron beam.
 9. The method for fabricating the semiconductordevice according to claim 1, wherein the energy beam is ultravioletlight.
 10. The method for fabricating the semiconductor device accordingto claim 1, wherein heat treatment is performed while applying theenergy beam.
 11. The method for fabricating the semiconductor deviceaccording to claim 1, wherein the step of forming the porous insulationfilm includes the steps of: applying an insulation film materialcontaining a thermally decomposable compound on the substrate byspin-coating; and performing heat treatment so that the thermallydecomposable compound is decomposed and pores are formed in theinsulation film material.
 12. The method for fabricating thesemiconductor device according to claim 1, wherein the step of formingthe porous insulation film includes the steps of: applying an insulationfilm material containing a cluster compound; and performing heattreatment so that a solvent in the insulation film material is vaporizedand pores are formed in the insulation film material.